For future generation mobile networks, we expect that the mobile devices like PDAs, note PCs or any VoIP-enabled communicators will have the feature of being always switched on, ready for service, constantly reachable by the wireless Internet. In addition to high access speed, attractive real-time contents or other expected spectacular features of the future wireless Internet environment, the mobile terminals has to be very much energy-aware to enable literal untethered movement of the user. Mechanisms for network activities like maintaining location information and wireless system discovery, which require regular network access, should be energy-efficient and resource-efficient in general. Cellular systems employ the notion of passive connectivity to reduce the power consumption of idle mobile hosts. In IP based Multi-service User Terminal (MUT) that may have multiple wireless interfaces for receiving various classes of services from the network, there should be an efficient addressing of the energy consumption issue. To devise an energy-efficient scheme for simultaneous or single operation of the wireless interfaces attached to such terminals we should have comprehensive understanding of the power consumption of the devices/modules in various operational states. This paper investigates the power consumption pattern or behavior of some selected wireless interfaces that are good candidates for being part of the future of the multi-service user terminals. We propose a simple model for predicting energy consumption in a terminal attributed to the wireless network interfaces. We measured the actual consumption pattern to estimate the parameters of the model.

Magnetic immunoassays utilizing magnetic marker and high Tc superconducting quantum interference device (SQUID) have been performed. In this magnetic method, binding-reaction between an antigen and its antibody is detected by measuring the magnetic field from the magnetic marker. First, we discuss the magnetic property of the marker, and show that Fe3O4 particles with diameter of 25 nm can be used for remanence measurement. We also show a design of the SQUID for sensitive detection of the magnetic signal from the marker. Next, we developed a measurement system utilizing the SQUID and a reaction chamber with very low magnetic contamination. Finally, we conducted an experiment on the detection of the biological materials called IL8 and IgE. At present, a few atto-mol of IL8 and IgE has been detected, which shows the high sensitivity of the present method.

In this work, the metal-oxide-metal (MOM) capacitor in the scaled CMOS process has been modeled at high frequencies using an EM simulator, and its layout has been optimized. The modeled parasitic resistance consists of four components, and the modeled parasitic inductance consists of the comb inductance and many mutual inductances. Each component of the parasitic resistance and inductance show different degrees of dependence on the finger length and on the number of fingers. The substrate network parameters also have optimum points. As such, the geometric dependence of the characteristics of the MOM capacitor is investigated and the optimum layout in the constant-capacitance case is proposed by calculating the results of the model. The proposed MOM capacitor structures for 50fF at f =60GHz are L =5μm with M =3, and, L =2μm with M =5 and that for 100fF at f =30GHz are L =9μm with M =3, and L =4μm with M =5. The target process is 65-nm CMOS.

A test structure to separately measure sheet resistances of highly-doped-drain (HDD) and lightly-doped-drain (LDD) in LDD-type CMOSFETs with various gate spaces S having sub-100 nm sidewalls was proposed. From the reciprocal of source/drain-resistance R-1 versus S characteristics, the sheet resistance ρH of the high-conductive-region (HCR) corresponding to HDD and the approximate width WLC of the low-conductive-region (LCR) corresponding to LDD could be estimated. Both of ρH and WLC for p- and n-MOS devices were scarcely dependent on the gate voltage. The sidewall-width difference of 40 nm could be sufficiently detected by using the test structure with the S pitch of about 60 nm. The R-1 versus S characteristics showed the unstable resistance variations in the narrow S region less than 0.3 µm, which corresponded to the minimum S for the process used for the test device fabrication and suggested that various micro-loading effects seriously affected on the characteristics.

A test structure to separately analyze the location where the hot-carrier-induced CMOSFET reliability is determined around the center or the isolation-edge along the channel-width was proposed and fabricated. The test structure has four kinds of MOSFETs; [A] and [D] MOSFETs with a short and a long channel-length all over the channel width, respectively, [B] MOSFET with the short and the long channel-length around the center and the both isolation-edges, respectively, and [C] MOSFET with the channel-length regions vice versa to the [B] MOSFET. The time dependent changes of the threshold voltages VT, the saturation currents IS, the linear currents IL and the maximum transconductances β up to 50,000 s were measured. All data for the wide channel-width MOSFETs were almost categorized into three; [A], [B]/[C] and [D]. The [B]/[C] data were well estimated from simple theoretical discussions by the combination of [A] and [D] data, which mean that the reliabilities are nearly the same around the center or the isolation-edge for the CMOSFETs.

We have developed a digital coprocessor with a dynamically reconfigurable pipeline architecture specified for a layered neural network which executes on-chip learning. The coprocessor attains a learning speed of 18 MCUPS that is approximately twenty times that of the conventional DSP. This coprocessor obtains expansibility in the calculation through a larger multi-layer, network by means of a network decomposition and a distributed processing approach.

In this paper, we review a super-steep subthreshold slope (SS) (<1 mV/dec) body-tied (BT) silicon on insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) fabricated with 0.15 µm SOI technology and discuss the possibility of its use in ultralow voltage applications. The mechanism of the super-steep SS in the BT SOI MOSFET was investigated with technology computer-aided design simulation. The gate length/width and Si thickness optimizations promise further reductions in operation voltage, as well as improvement of the ION/IOFF ratio. In addition, we demonstrated control of the threshold voltage and hysteresis characteristics using the substrate and body bias in the BT SOI MOSFET.

A hierarchical timing adjuster that operates with intermittent adjustment has been developed for use in low-power DDR SDRAMs. Intermittent adjustment reduces power consumption in both coarse- and fine-delay circuits. Furthermore, the current-controlled fine-tuning of delay is free of short-circuit current and achieves a resolution of about 0.1 ns. In a design with 0.16-µm node technology, these techniques make the hierarchical timing adjuster able to reduce the operating current to 4.8 mA, which is 20% for the value in a conventional scheme with every-cycle measurement. The proposed timing adjuster achieves a three-cycle lock-in and only generates an internal clock pulse that has coarse resolution in the second cycle. The circuit operates over the range from 60 to 150 MHz, and occupies 0.29 mm2.

A hard-type oscillator is defined as an oscillator having stable fixed points within a stable limit cycle. For resonant tunneling diode (RTD) oscillators, using hard-type configuration has a significant advantage that it can suppress spurious oscillations in a bias line. We have fabricated hard-type oscillators using an InGaAs-based RTD, and demonstrated a proper operation. Furthermore, the oscillating properties have been compared with a soft-type oscillator having a same parameters. It has been demonstrated that the same level of the phase noise can be obtained with a much smaller power consumption of approximately 1/20.

With the proliferation of various types of computing and networking resources in ubiquitous computing environments, an architecture allowing mobile users to flexibly access these resources is desirable. We have focused our attention on the access link resources of devices surrounding users. Our framework named Personal Mesh allows personal devices to seamlessly access the Internet via appropriate access links available in a personal area network. The Personal Mesh deals with two technical issues: access link selection management and a PAN mobility support mechanism. In this paper, we describe the design and implementation of Personal Mesh and show the effectiveness of our system by experiment.

Ferroelectric non-volatile memory (FeRAM) has been inspiring interests since bismuth layer perovskite material family was found to provide "Fatigue Free" endurance, superior retention and imprint characteristics. In this paper, we will provide new circuits technology for FeRAM developed to implement high speed operation, low voltage operation and low power consumption. Performance of LSI embedded with FeRAM for contactless IC card is also provided to demonstrate the feasibility of the circuit technology.

Layered multicast approach enables IP multicast to adapt to heterogeneous networks. In layered multicast, each layer of a session is sent to separate multicast groups. These layers will be transmitted on the same route, or on different routes. However, traditional congestion control schemes of layered multicast do not consider the case when layers of a session are transmitted on different routes. In this paper, at first we show that in sparse-mode routing protocols like PIM-SM and CBT, layers of a session can be mapped to different Rendezvous Points or cores due to the bootstrap mechanism. It means that layers of a session can be transmitted on different routes. We then show that traditional congestion control schemes of layered multicast do not work properly in sparse-mode routing regions. At last we introduce Rendezvous Point based Layered Multicast (RPLM), a novel congestion control scheme suitable for sparse-mode routing regions, and show that RPLM works efficiently in regions using sparse mode routing protocols. RPLM uses per-RP packet loss rate instead of the overall one to detect congestion on each route, and can react to congestion quickly by dropping the highest layer on the congested route. In addition, RPLM simultaneously drops all the layers those are useless in quality's improvement to prevent bandwidth waste.

Processing elements (PEs) with a dynamically reconfigurable pipeline architecture allow the high-speed calculation of widely used neural model which is multi-layer perceptrons with the backpropagation (BP) learning rule. Its architecture that was proposed for a single chip is extended to multiprocessors' structure. Each PE holds an element of the synaptic weight matrix and the input vector. Multi-local buses, a swapping mechanism of the weight matrix and the input vector, and transfer commands between processor elements allow the implementation of neural networks larger than the physical PE array. Estimated peak performance by the measurement of single processor element is 21.2 MCPS in the evaluation phase and 8.0 MCUPS during the learning phase at a clock frequency of 50 MHz. In the model, multi-layer perceptrons with 768 neurons and 131072 synapses are trained by a BP learning rule. It corresponds to 1357 MCPS and 512 MCUPS with 64 processor elements and 32 neurons in each PE.

The purpose of the online graph exploration problem is to visit all the nodes of a given graph and come back to the starting node with the minimum total traverse cost. However, unlike the classical Traveling Salesperson Problem, information of the graph is given online. When an online algorithm (called a searcher) visits a node v, then it learns information on nodes and edges adjacent to v. The searcher must decide which node to visit next depending on partial and incomplete information of the graph that it has gained in its searching process. The goodness of the algorithm is evaluated by the competitive analysis. If input graphs to be explored are restricted to trees, the depth-first search always returns an optimal tour. However, if graphs have cycles, the problem is non-trivial. In this paper we consider two simple cases. First, we treat the problem on simple cycles. Recently, Asahiro et al. proved that there is a 1.5-competitive online algorithm, while no online algorithm can be (1.25-ε)-competitive for any positive constant ε. In this paper, we give an optimal online algorithm for this problem; namely, we give a (1.366)-competitive algorithm, and prove that there is no (-ε)-competitive algorithm for any positive constant ε. Furthermore, we consider the problem on unweighted graphs. We also give an optimal result; namely we give a 2-competitive algorithm and prove that there is no (2-ε)-competitive online algorithm for any positive constant ε.

The dependences of the structural, optical and electrical properties of highly transparent conductive Ga-doped ZnO (GZO) films on thickness have been studied. GZO films were prepared on unheated glass, polymethyl methacrylate (PMMA) and cyclo olefin polymer (COP) substrates by ion plating deposition with direct-current arc discharge. Polycrystalline GZO films with good adherence to a substrate having a (0002) preferred orientation have been obtained. Very little difference was found between the resistivity values of the GZO films on the glass substrate and those of the GZO films on the different polymer substrates, at any given film thickness. On both plastic substrates, the resistivity of the GZO films decreased from 210- 3 to 510-4 Ωcm with increasing film thickness.

This paper presents a data gathering protocol for wireless sensor network applications that require high throughput and topology adaptability under the premises of uniform traffic and energy-rich environments. Insofar as high throughput is concerned, TDMA is more suitable than CSMA. However, traditional TDMA protocols require complex scheduling of transmission time slots. The scheduling burden is the primary barrier to topology adaptability. Under the premises of uniform traffic and energy-rich environments, this paper proposes a token-scheduled multi-channel TDMA protocol named TKN-TWN to ease the scheduling burden while exploiting the advantages of TDMA. TKN-TWN uses multiple tokens to arbitrate data transmission. Due to the simplified scheduling based on tokens, TKN-TWN is able to provide adaptability for topology changes. The contention-free TDMA and multi-channel communication afford TKN-TWN the leverage to sustain high throughput based on pipelined packet forwarding. TKN-TWN further associates the ownership of tokens with transmission slot assignment toward throughput optimization. We implement TKN-TWN on Tmote Sky with TinyOS 2.1.1 operating system. Experimental results in a deployed network consisting of 32 sensor nodes show that TKN-TWN is robust to network changes caused by occasional node failures. Evaluation also shows that TKN-TWN is able to provide throughput of 9.7KByte/s.

In this paper, we introduce a concept of minimum bandwidth guaranteed service model for mobile multimedia. In this service model, service is defined in the context of the guaranteed minimum bandwidth and the residual service share. Each flow under this service model is guaranteed with its minimum bandwidth and provided with more in proportion to the residual service share if there is leftover bandwidth. The guaranteed minimum bandwidth assures a flow to keep minimum tolerable quality regardless of the network load, while the leftover bandwidth enhances the quality of service according to the application's adaptivity and the user's interest. We show that the minimum bandwidth guaranteed service model could be implemented by a two-folded wireless packet scheduler consisting of a guaranteed scheduler and a sharing scheduler. Wireless channel condition of each flow is considered in scheduling so that wireless resource can be distributed only to the flows of good channel state, improving total wireless link utilization. We evaluate the service model and the scheduling method by simulation and implementation.

The Communications Research Laboratory (CRL) started a new project named the New Generation Mobile Network Project in April 2002. The target of this project is the development of new technologies to enable seamless and secure integration of various wireless access networks such as 3rd and 4th generation cellular, wireless LAN, high-speed mobile wireless, wired communications, and broadcasting networks. This paper presents an overview of CRL's new generation mobile communication system that is called The Multimedia Integrated Network by Radio Access Innovation Plus (MIRAI+), as well as details the role of Software Radio Technology (SDR) in MIRAI+.

We propose a system named ETIS (Energy-based Tree Illustration System) for automatically generating tree illustrations characteristic of two-dimensional ones with features such as exaggerated branch curves, leaves, and flowers. The growth behavior of the trees can be controlled by adjusting the energy. The canopy shape and the region to fill with leaves and flowers are also controlled by hand-drawn guide lines.